High data reliability, high speed of memory access, and reduced chip size are features that are demanded from semiconductor memory. In recent years, there has been an effort to further increase the speed of memories while simultaneously reducing power consumption. In some applications, memory may be placed a power-down or standby state to reduce power consumption for a period of time. Memory operations may be suspended while the memory is in the power-down or standby state. In some examples, to reduce a transition to normal operation, the memory suspend some portions of the memory in high voltage states. One side effect of suspending some circuitry at a higher voltage state may include unintended leakage current through portions of the circuitry. The leakage current may cause the memory to consume additional power.
Integrated circuit devices traverse a broad range of electronic devices. One particular type include memory devices, oftentimes referred to simply as memory. Memory devices are typically provided as internal, semiconductor, integrated circuit devices in computers or other electronic devices. There are many different types of memory including random-access memory (RAM), read only memory (ROM), dynamic random access memory (DRAM), synchronous dynamic random access memory (SDRAM), and flash memory.
Input buffers are commonly used in integrated circuit devices to condition received data or strobe signals so as to provide output signals having well-defined logic levels, either for internal use or for transmission to external devices. Such buffers generally include some form of differential amplifier responsive to two input voltage signals, such as complementary strobe signals, or a data signal and a reference voltage. In an ideal situation, a differential amplifier will operate to transition its output voltage signal when the two input voltage signals cross, e.g., when they are equal. However, variabilities inherent in typical integrated circuit fabrication, or imbalances in signal termination impedance, may result in a voltage offset, such that the buffer may transition its output voltage signal at a point other than when the two input voltage signals are equal. Such behavior can be a significant error source surrounding setup and hold time requirements for the buffer.